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xiaozhengsheng
193
modules/nrfx/mdk/ses_startup_nrf_common.s
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193
modules/nrfx/mdk/ses_startup_nrf_common.s
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/***********************************************************************************
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* SEGGER Microcontroller GmbH *
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* The Embedded Experts *
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***********************************************************************************
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* *
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* (c) 2014 - 2018 SEGGER Microcontroller GmbH *
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* *
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* www.segger.com Support: support@segger.com *
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* *
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***********************************************************************************
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* *
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* All rights reserved. *
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* *
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* Redistribution and use in source and binary forms, with or *
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* without modification, are permitted provided that the following *
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* conditions are met: *
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* *
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* - Redistributions of source code must retain the above copyright *
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* notice, this list of conditions and the following disclaimer. *
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* *
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* - Neither the name of SEGGER Microcontroller GmbH *
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* nor the names of its contributors may be used to endorse or *
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* promote products derived from this software without specific *
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* prior written permission. *
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* *
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
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* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
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* DISCLAIMED. *
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* IN NO EVENT SHALL SEGGER Microcontroller GmbH BE LIABLE FOR *
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
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* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
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* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
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* DAMAGE. *
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* *
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***********************************************************************************
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* *
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* This file has been modified by Nordic Semiconductor: *
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* To separate out device-specific data *
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* *
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***********************************************************************************/
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/************************************************************************************
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* Preprocessor Definitions *
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* ------------------------ *
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* NO_FPU_ENABLE *
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* *
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* If defined, FPU will not be enabled. *
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* *
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* NO_STACK_INIT *
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* *
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* If defined, the stack pointer will not be initialised. *
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* *
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* NO_SYSTEM_INIT *
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* *
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* If defined, the SystemInit() function will not be called. By default *
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* SystemInit() is called after reset to enable the clocks and memories to *
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* be initialised prior to any C startup initialisation. *
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* *
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* NO_VTOR_CONFIG *
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* *
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* If defined, the vector table offset register will not be configured. *
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* *
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* MEMORY_INIT *
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* *
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* If defined, the MemoryInit() function will be called. By default *
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* MemoryInit() is called after SystemInit() to enable an external memory *
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* controller. *
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* *
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* STACK_INIT_VAL *
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* *
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* If defined, specifies the initial stack pointer value. If undefined, *
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* the stack pointer will be initialised to point to the end of the *
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* RAM segment. *
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* *
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* VECTORS_IN_RAM *
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* *
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* If defined, the exception vectors will be copied from Flash to RAM. *
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* *
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************************************************************************************/
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.syntax unified
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.global Reset_Handler
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#ifdef INITIALIZE_USER_SECTIONS
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.global InitializeUserMemorySections
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#endif
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.extern _vectors
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.extern nRFInitialize
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.global afterInitialize
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.section .init, "ax"
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.thumb_func
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.equ VTOR_REG, 0xE000ED08
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.equ FPU_CPACR_REG, 0xE000ED88
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#ifndef STACK_INIT_VAL
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#define STACK_INIT_VAL __RAM1_segment_end__
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#endif
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Reset_Handler:
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/* Perform prestart tasks. */
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b nRFInitialize
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.thumb_func
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afterInitialize:
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#ifndef NO_STACK_INIT
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/* Initialise main stack */
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ldr r0, =STACK_INIT_VAL
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ldr r1, =0x7
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bics r0, r1
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mov sp, r0
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#endif
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#ifndef NO_SYSTEM_INIT
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/* Initialise system */
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ldr r0, =SystemInit
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blx r0
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#endif
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#ifdef MEMORY_INIT
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ldr r0, =MemoryInit
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blx r0
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#endif
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#ifdef VECTORS_IN_RAM
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/* Copy exception vectors into RAM */
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ldr r0, =__vectors_start__
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ldr r1, =__vectors_end__
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ldr r2, =__vectors_ram_start__
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1:
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cmp r0, r1
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beq 2f
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ldr r3, [r0]
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str r3, [r2]
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adds r0, r0, #4
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adds r2, r2, #4
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b 1b
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2:
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#endif
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#ifndef NO_VTOR_CONFIG
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/* Configure vector table offset register */
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ldr r0, =VTOR_REG
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#ifdef VECTORS_IN_RAM
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ldr r1, =_vectors_ram
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#else
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ldr r1, =_vectors
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#endif
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str r1, [r0]
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#endif
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#if (defined(__ARM_ARCH_FPV4_SP_D16__) || defined(__ARM_ARCH_FPV5_D16__)) && !defined(NO_FPU_ENABLE)
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/* Enable FPU */
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ldr r0, =FPU_CPACR_REG
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ldr r1, [r0]
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orr r1, r1, #(0xF << 20)
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str r1, [r0]
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dsb
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isb
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#endif
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/* Jump to program start */
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b _start
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#ifdef INITIALIZE_USER_SECTIONS
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.thumb_func
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InitializeUserMemorySections:
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ldr r0, =__start_nrf_sections
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ldr r1, =__start_nrf_sections_run
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ldr r2, =__end_nrf_sections_run
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cmp r0, r1
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beq 2f
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subs r2, r2, r1
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beq 2f
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1:
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ldrb r3, [r0]
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adds r0, r0, #1
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strb r3, [r1]
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adds r1, r1, #1
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subs r2, r2, #1
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bne 1b
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2:
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bx lr
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#endif
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